Robert Dennard / DRAM
What is the cheapest way to hold one bit?
That time, that place
In the 1960s computer memory was made of tiny iron rings threaded with wire — one ring per bit, threaded by hand. Expensive, heavy and slow. Transistor memory had been tried, but it took about six transistors to hold one bit, and that was costly.
Why this question
An engineer at IBM Research asked whether one bit really needed six transistors. He drew the simplest possible picture: one tiny vessel that briefly holds charge (a capacitor), and one switch that opens and closes its door (a transistor). Charge in the vessel means 1; empty means 0.
What was found
In 1966 he designed a memory cell of one transistor and one capacitor: DRAM. Six had become one, so the same area held six times as much and the price fell accordingly.
There was one cost. The vessel **leaks.** Its charge drains away within milliseconds, so DRAM must read and refill every cell dozens of times a second — hence the 'dynamic' in the name. Billions of vessels forever leaking and forever refilled: that is the memory in every computer today.
Ring memory kept its contents with the power off, but was big and slow. DRAM forgets when switched off, but is small, fast and cheap. This is where memory split into 'what stays' and 'what is fast'.
The first commercial DRAM chip arrived in 1970 and drove out ring memory within a few years. In 1974 the same man formulated the rule that shrinking a transistor makes it both faster and less power-hungry — the road semiconductors would follow for three decades simply by getting smaller.
The DRAM cell is nearly unchanged after sixty years; what changed is size and stacking. When the processor's wait for memory became the bottleneck, HBM stacked memory upward and set it beside the processor. Underneath is still one vessel and one switch.